Abstract :
In DSP (Digital Signal Processing), the MAC unit, or Multiply-Accumulate Computation, plays a vital role in the processing chain. The multiplier distinguishes among its constituents as a crucial building piece. This paper describes the design of the multiply-accumulate unit with the Novel sleep Transistor technique and compares 8-bit MACs and their building blocks with relevant techniques. This MAC unit is designed with Cadence 45nm technology. These designs are analyzed and simulated with a virtuoso simulation tool.